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Microchip Technology /ATSAME51J20A /DSU /CTRL

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Interpret as CTRL

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7 43 0 0 00 0 0 0 0 0 0 0 0 (SWRST)SWRST 0 (CRC)CRC 0 (MBIST)MBIST 0 (CE)CE 0 (ARR)ARR 0 (SMSA)SMSA

Description

Control

Fields

SWRST

Software Reset
CRC

32-bit Cyclic Redundancy Code
MBIST

Memory built-in self-test
CE

Chip-Erase
ARR

Auxiliary Row Read
SMSA

Start Memory Stream Access

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data